The status word can be seen by displaying the STATUS column while monitoring in STL view. The RLO (bit 1) and the STA (bit 2) are also displayed in the RLO and STA column.
BR Binary Result Bit (Status Word, Bit 8)
The BR bit is bit 8 of the status word.
The BR bit transfers the results obtained from processing Statement List (STL) instructions on to the next instructions to be processed.
The Binary Result transfers the result of the operations
onto the next instruction for reference. When the BR bit is 1 it enables the output
of the block (ENO) to be TRUE and thus allow other blocks after it to be
processed. The SAVE, JCB and JNB instructions set the BR bit.
· If an error occurred during execution, the BR bit is ‘’0”.
· If the function was executed with no error, the BR bit is ‘’1”.
CC 1, CC 0 Condition Codes (Status Word, Bits 6 and 7)
The Condition Code bits provide results for comparison and math instructions.
Comparison Instructions
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
ACCU 2 = ACCU 1
|
0
|
1
|
ACCU 2 < ACCU 1
|
1
|
0
|
ACCU 2 > ACCU 1
|
1
|
1
|
Unordered (floating point comparison only)
|
Math Instructions, without Overflow
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
Result = 0
|
0
|
1
|
Result < 0
|
1
|
0
|
Result > 0
|
Integer Math Instructions, with Overflow
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
Negative range overflow in ADD_I and ADD_DI
|
0
|
1
|
Negative range overflow in MUL_I and MUL_DI
|
1
|
0
|
Negative range overflow in ADD_I, ADD_DI, SUB_I, and SUB_DI
|
1
|
1
|
Division by 0 in DIV_I, DIV_DI, and MOD_DI
|
Floating Point Math Instructions, with Overflow
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
Gradual underflow
|
0
|
1
|
Negative range overflow
|
1
|
0
|
Positive range overflow
|
1
|
1
|
Not a valid floating-point number
|
Shift and Rotate Instructions
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
Bit shifted out = 0
|
1
|
0
|
Bit shifted out = 1
|
Word Logic Instructions
CC 1
|
CC 0
|
Meaning
|
0
|
0
|
Result = 0
|
1
|
0
|
Result <> 0
|
OV Overflow (Status Word, Bit 5)
The OV bit displays errors for math instructions or comparison instructions with floating point numbers.
The OV bit is bit 5 of the status word.
It is set by a math instruction with floating point numbers after a fault has occurred (overflow, illegal operation, comparison unordered). The OV bit is reset when the fault is eliminated.
OS Overflow Stored (Status Word, Bit 4)
The OS bit stores the OV bit if an error occurs during math instructions or comparison instructions with floating point numbers.
The OS bit is bit 4 of the status word.
The OS bit is set, together with the OV (Overflow) bit, in the event of a fault. It remains set after the fault has been eliminated. It thus stores the OV bit status and indicates whether or not a fault has occurred in one of the previously executed instructions.
The following commands reset the OS bit:
·
JOS (Jump if OS=1)
·
Block call instructions
·
Block end instructions
OR (Status Word, Bit 3)
The OR bit is used for combining AND functions before OR functions.
The OR bit is status word bit 3.
The OR bit is set if the RLO of the AND logic operation is 1. This anticipates the result of the OR logic operation. Every other bit-processing instruction resets the OR bit.
STA Status Bit (Status Word, Bit 2)
The STA bit stores the value of an addressed bit.
The STA bit is bit 2 of the status word.
The status of a bit logic instruction that performs a read access to memory (A, AN, O, ON, X, or XN) is always the same as the value of the addressed bit. The status of a logic instruction that may perform a write access to the memory (R, S, or =) is the same as the value of the written bit or, if writing is not performed, the same as the value of the addressed bit. The status bit has no significance for bit instructions that do not access the memory. These instructions set STA to 1. The status bit is not read by instructions, it is interpreted for you when viewing the online status of program variables.
RLO Result of Logic Operation (Status Word, Bit 1)
The RLO bit stores the result of a logic operation string or comparison instruction.
The RLO bit is status word bit 1.
The first instruction in a segment checks the contact signal state. The RLO is set to ‘’1’’ if the check is executed. The second instruction also checks the contact signal state. This check result is now combined with the value stored in the RLO bit according to the Boolean algebra rules and stored in the RLO bit. This logic string ends after an assignment or a conditional jump. Depending on the RLO bit value, an assignment or a conditional jump is executed.
/FC First Check Bit (Status Word, Bit 0)
The /FC bit signal state controls a logic operation string.
The /FC bit is status word bit 0.
Each logic operation queries the /FC bit signal state and the addressed contact.
·
If the /FC bit signal state equals ‘’1,’’ an instruction logically combines the result of its signal state check on its addressed contact with the RLO generated since the first check and stores the result in the RLO bit.
·
If the /FC bit signal state equals ‘’0,’’ the logic string begins with a first check.
The logic string ends and the /FC bit is set to ‘’0’’ with the assignment of a value (S,R,=) or with a RLO-dependent jump instruction.
!--RELATED-POSTS-STARTS-->
